Field of the Invention
The present invention relates to a power supply voltage control system and, more particularly, to a supply voltage control method of supplying a suitable power supply voltage to an internal circuit in a semiconductor integrated circuit such as an ASIC (Application Specific Integrated Circuit).
Description of the Related Art
An ASV (Adaptive Supply Voltage) technique (see, for example, Japanese Patent Laid-Open No. 2009-10344) is available as a technique of supplying a power supply voltage suitable for operating a semiconductor integrated circuit including a plurality of logic circuits at a desired operating frequency. ASV control is a supply voltage control technique to cope with process variation at the time of the manufacture of chips.
ASV control is provided with a process monitor for the recognition of the state of a process in a semiconductor integrated circuit to recognize a process state in a semiconductor integrated circuit from its output information. Control is performed on a semiconductor integrated circuit capable of operating at higher speed than that in a reference state depending on manufacturing variation so as to make the circuit operate upon decreasing the supply voltage within a range in which the circuit normally operates at a target operating frequency. Decreasing the supply voltage will obtain the effect of reducing leakage power in proportion to the voltage and the effect of reducing dynamic power in proportion to the square of the voltage. On the other hand, control is performed on a semiconductor integrated circuit capable of only operating at lower speed than that in a reference state depending on manufacturing variation so as to make the circuit operate upon increasing the supply voltage, thereby making the circuit operate at a target operating frequency.
A power supply unit in ASV control starts up first at an initial voltage value. After the unit executes an ASV control sequence, the voltage transits to a corrected voltage value. That is, the supply voltage to the semiconductor integrated circuit shifts until the voltage is stabilized by the corrected voltage value. For this reason, an unstable operation of an internal logic may cause a trouble in operation. Therefore, control needs a sequence of performing an operation different from a normal operation so as to make the internal logic reliably operate until the operation becomes stable with a corrected voltage value and then switching to a normal logic operation after the supply voltage is stabilized by the corrected voltage value.
The power supply startup time and the sleep return time in a product are items directly associated with usability for the user, and it is a challenge to shorten them as much as possible. Therefore, in order to shorten the power supply startup time and the sleep return time, it is necessary to, for example, shorten the time to switch the operation of the internal logic immediately after transition to a corrected voltage value by ASV control and the transit time from the initial voltage value to the corrected voltage value.
For example, there is available a method (overdriven control) of making a semiconductor integrated circuit operate at higher speed than that at the time of the application of a rated voltage normally used for the circuit by applying a voltage higher than the rated voltage. When performing both overdriven control and ASV control, an internal logic based on overdriven control cannot operate at high speed with an initial voltage value. For this reason, when executing ASV control sequence, the internal logic needs to operate at a low frequency at which it can operate with the initial voltage value. Upon completion of transition to a corrected voltage value, the internal operation clock is switched to a high-frequency clock to keep executing the startup sequence. When performing the processing of switching the operation of an internal logic upon stabilization with a corrected voltage value in ASV control as well as such overdriven control, it is necessary to detect that the internal logic is stabilized by the corrected voltage value and shorten the transit time to the corrected voltage value.